1. Field of the Invention
The present invention relates to a compound semiconductor device and, more particularly, to a structure of a via hole (through-hole) in said semiconductor device and a method and an etchant used for manufacturing the via hole.
2. Description of the Related Art
Where an IC (integrated Circuit) is to be designed to be used at a frequency higher than quasi-microwave band, since the behavior of electrons as waves cannot be disregarded, the IC must be designed as a distributed constant line. As this distributed constant line, a microstrip circuit line is widely used.
Where a microstrip line is used, as schematically shown in FIG. 17, a via hole 104 must be formed in order to electrically connect an electrode pad 102 on the front surface of a GaAs substrate 101 to a ground conductor, which is metal, on the back surface thereof, and a strip conductor 105 is formed on the front surface of the GaAs substrate 101.
FIG. 18 shows a sectional view when a semiconductor chip (hereinafter referred to as xe2x80x9cIC substratexe2x80x9d) is die-bonded to a package substrate 106 using AuSn solder 107. As shown in FIG. 18, in order to prevent xe2x80x9csolder upheaval or permeancexe2x80x9d, a barrier metal 108 of e.g. Ni was formed in only a region constituting the via hole 104a on the surface of the conductive Au film 104b. 
Further, as shown in FIG. 18, the region occupied by the via hole 104a corresponds to a region whose diameter is twice or more as large as the thickness of the GaAs substrate 101.
The semiconductor device having the same structure as the via hole structure is disclosed in JP-A-2-162735.
Referring now to FIG. 19, an explanation will be given of a method of forming a via hole described in the reference.
First, as shown in FIG. 19(a), an electrode pad 102 is patterned on the front surface of a GaAs substrate 101. As shown in FIG. 19(b), on the back surface of the GaAs substrate 101, an etching mask 109a having an opening pattern is patterned at the area corresponding to the electrode pad 102. Further, as shown in FIG. 19(c), the back surface of the GaAs substrate 101 is subjected to wet etching to form an opening 109. In this case, the diameter of the opening 109 at the back surface of the GaAs substrate 101 is twice or so as large as the thickness of the GaAs substrate 101. As shown in FIG. 19(d), the etching mask 109a is removed.
As shown in FIG. 19(e), a conductive Au film 104b is plated onto the entire back surface of the GaAs substrate 101.
Thereafter, as shown in FIG. 19(f), a resist pattern 110 is formed at an area except the region constituting the via hole 104a on the back surface of the GaAs substrate 101.
The resist pattern 110 has an opening pattern at the area corresponding to the via hole 104a. 
As shown in FIG. 19(g), the GaAs substrate 101 is subjected to electrolytic or non-electrolytic Ni plating to form a barrier metal 108 of Ni on the surface of the via hole 104a. 
As shown in FIG. 19(h), the resist pattern 110 is etched away to complete an IC substrate.
The back surface of the IC substrate shown in FIG. 19(h) is bonded to the front surface of the package substrate 106 to provide a semiconductor device having a sectional structure as shown in FIG. 18.
However, the semiconductor device thus manufactured has the following defects. In the via hole 104 included in the semiconductor device shown in FIG. 18 (via hole 104a in FIG. 19) is opened by wet etching it reaches the front surface of the GaAs substrate 101 from the back surface thereof.
However, when the via hole is opened by the wet etching as described above, the diameter of the opening 109 formed on the back surface of the GaAs substrate 101 was twice or more as large as the thickness of the GaAs substrate 101. With development of miniaturization of the semiconductor device, reduction of the via hole 104a is a critical problem to facilitate device miniaturization.
In order to solve this problem, one of the inventors of the present invention has already accomplished a semiconductor device in which an opening with a high aspect ratio is made by RIE (Reactive Ion Etching) and an via hole is formed in the opening.
FIG. 20(a) shows a sectional structure of the via hole disclosed in JP-A-7-193214.
In FIG. 20(a), reference numeral 111 denotes an underlying-wiring 111 applied to the back surface of the GaAs substrate 101; 112 denotes a film stacked on the front surface of the GaAs substrate 101 which is an insulating film serving as an etching mask when the opening 109 for making a via hole is formed; 113 denotes a sputter layer having a two-layer structure of a layer of any material of Ti, Cr and Ni, and Au, which is stacked on the internal wall of the opening 109; 114 denotes an non-electrolytic Ni plating layer stacked in the opening 109 where the sputter layer 113 is stacked; 115 denotes an Au plating layer stacked on the surface of the non-electrolytic plating layer 114; and 116 denotes a power supply layer consisting of the sputter layer 113, non-electrolytic Ni plating 114 and Au plating layer 115.
In the semiconductor device described above, because the internal wall of the opening does not become flat when the sputter layer 113 serving as a catalyst for film deposition by plating, the non-electrolytic Ni plating layer 114 is further deposited on the internal wall and bottom of the opening 109a constituting the via hole 104a within the GaAs substrate 101 so that their surface becomes flat. Thus, the Au plating layer 115 which is a main part of the power supply layer 116 could be formed to have a uniform thickness along the front surface of the GaAs substrate 1 and the shape of the internal wall of the opening constituting the via hole 104a. 
The above reference describes that the via hole 10a shown in FIG. 20(a) is made as follows. The insulating film 112 is patterned as an etching mask pattern on the surface of the GaAs substrate 101. Using it as the etching mask, the opening 109 (not penetrating through the GaAs substrate 101) having a high aspect ratio is formed. After the power supply layer 116 is formed within the opening, the back surface of the substrate 101 is etched back until part of the power supply layer 116 is exposed. Finally, the underlying wiring 111 is formed on the back surface of the GaAs substrate 101.
By forming the via hole 104a within the opening with a high aspect ratio having a structure as shown in FIG. 20(a), it can have an occupying area that is a factor of a few when the opening was made by wet etching.
The present invention has been accomplished in order to solve the above problem, and intends to provide a semiconductor device having a stable structure which has a via hole with a small occupying area, does not generate xe2x80x9csolder upheavalxe2x80x9d phenomenon and makes no crack, a method of manufacturing it and an etchant suitable for the method.
A first aspect of a semiconductor device is a device of the prevent invention, which comprises: a semiconductor substrate; an electrode pad formed on the front surface of said semiconductor substrate; an Au film formed on the entire back surface of said semiconductor substrate inclusive of the inner wall and bottom of a cylindrical opening made from the back surface of said semiconductor substrate to the front surface thereof; and a Ni alloy non-electrolytic plating film deposited at a region constituting the via hole including the opening on said Au film.
A second aspect of the semiconductor device is a device of the present invention, which comprises: a semiconductor substrate; an electrode pad formed on the front surface of said semiconductor substrate; a first Au film and a Ni alloy non-electrolytic plating film which are successively stacked on the entire back surface of said semiconductor substrate inclusive of the inner wall and bottom of a cylindrical opening made from the back surface of said semiconductor substrate to the front surface thereof; and a second Au film deposited at an area except a region constituting the via hole including the opening on the said Au film.
A third aspect of the semiconductor device is a device according to the second aspect, wherein said second Au film is a film deposited by plating or evaporation.
A fourth aspect of the semiconductor device is a device of the present invention:a semiconductor substrate; an electrode pad formed on the front surface of said semiconductor substrate; a first Au film on the back surface of said semiconductor substrate inclusive of the inner wall and bottom of a composite stepped opening of a first opening having a large diameter made from the back surface of said semiconductor substrate and a second opening which is a cylinder having a small diameter made from the bottom of said first opening to the front surface of said semiconductor substrate; and an Ni alloy non-electrolytic plating film deposited on said Au film at the area except the said second opening in the region constituting a via hole including said openings.
A fifth aspect of the semiconductor device is a device of the present invention, which comprises: a semiconductor substrate; an electrode pad formed on the front surface of said semiconductor substrate; a first Au film and Ni plating film successively stacked on the back surface of said semiconductor substrate inclusive of the inner wall and bottom of a composite opening of a first opening having a large diameter made from the back surface of said semiconductor substrate and a second opening which is a cylinder having a small diameter made from the bottom of said first opening to the front surface of said semiconductor substrate; and a second Au film deposited on said Ni plating film at the area except the said second opening in the region constituting a via hole including said composite opening, said Ni plating film being a Ni alloy non-electrolytic plating film.
A sixth aspect of the semiconductor device is a device according to the fourth or fifth aspect, wherein said first opening having a large diameter is a cylindrical opening formed by anisotropic dry etching, or an opening which is formed by wet isotropic etching and has a diameter in the back surface of said semiconductor substrate being equal to said large diameter and decreasing-with the depth of said semiconductor substrate.
A seventh aspect of the semiconductor device is a device according to any one of the first to fifth aspect , further comprising a package substrate bonded to the surface of said Au film or said second Au film through solder, wherein, of said Au film or said second Au film, said Au film or said second Au film located at the region except a region constituting said via hole is bonded to said package substrate through said solder.
A eighth aspect of the semiconductor device is a device according to any one of the first and the second aspect, wherein the aspect ratio of said opening is within a range from 1 to 10/3.
A ninth aspect of the semiconductor device is a device according to any one of the fourth and fifth aspect, wherein said second opening has a diameter from 25 xcexcm to 60 xcexcm.
A tenth aspect of the method of manufacturing a semiconductor device, which comprises the steps of: forming an electrode pad on the front surface of a semiconductor substrate; forming a cylindrical opening extending from the back surface of said semiconductor substrate to the front surface thereof; by anisotropic dry etching; depositing an Au film on said entire back surface inclusive of the inner wall and bottom of said cylindrical opening by plating; depositing a Ni alloy non-electrolytic plating film on the entire back surface by plating; forming a mask covering a region constituting a via hole including the opening; etching said Ni alloy non-electrolytic plating film using said mask as an etching mask so that said Ni alloy non-electrolytic plating film is selectively left at a region corresponding to said via hole; and removing said mask.
An eleventh aspect of the method of manufacturing a semiconductor device is a method according to the tenth aspect wherein said Ni alloy non-electrolytic plating film is etched using, as an etchant, sulfuric/nitric acid containing sulfuric acid of 96 wt %, nitric acid of 70 wt % and water=1:1:3, or ion milling.
A twelfth aspect of a method of manufacturing a semiconductor device of the present invention, which comprises: forming an electrode pad on the front surface of a semiconductor substrate; forming a cylindrical opening extending from the back surface of said semiconductor substrate to the front surface thereof by anisotropic dry etching; depositing a first Au film on the entire back surface inclusive of the inner wall and bottom of said cylindrical opening by plating; depositing a Ni alloy non-electrolytic plating film on the first Au film on the entire back surface by plating; depositing a second Au film on the entire back surface by plating; forming a mask covering a region constituting a via hole including the opening; etching said Au film using said mask as an etching mask so that said Ni alloy non-electrolytic plating film is selectively left at a region corresponding to said via hole; and removing said mask.
A thirteenth aspect of the method of manufacturing a semiconductor device is a method of the present invention, which comprises the steps of: forming an electrode pad on the front surface of a semiconductor substrate; forming a cylindrical opening extending from the back surface of said semiconductor substrate to the front surface thereof by anisotropic dry etching;
depositing a first Au film on the entire back surface inclusive of the inner wall and bottom of said cylindrical opening by plating; depositing a Ni alloy non-electrolytic plating film on the first Au film on the entire back surface by plating; and depositing a second Au film at the region except said opening on the surface of said Ni alloy non-electrolytic plating film by evaporation so that said Ni alloy non-electrolytic plating film on the surface of said opening constituting a via hole is selectively exposed.
A fourteenth aspect of the method of manufacturing a semiconductor device is a method of the present invention ,which comprises the steps of: forming an electrode pad on the front surface of a semiconductor substrate; etching said semiconductor substrate from its back surface to form a first opening having a large diameter; subjecting said semiconductor substrate to anisotropic dry etching from the bottom of said first opening to the front surface of said semiconductor substrate to form a second opening having a small diameter, thereby forming a composite opening of said first and second openings; depositing an Au film on said entire back surface inclusive of the inner wall and bottom of said composite opening by plating; forming a mask on the back surface of said semiconductor substrate except a region constituting a via hole including the composite opening; plating the back surface of said semiconductor substrate with Ni to form a Ni film deposited on the inner wall and bottom of said first opening; and removing said mask.
A fifteenth aspect of the method of manufacturing a semiconductor device is a method of the present invention ,which comprises the steps of: forming an electrode pad on the front surface of a semiconductor substrate; etching said semiconductor substrate from its back surface to form a first opening having a large diameter; subjecting said semiconductor substrate to anisotropic dry etching from-the bottom of said first opening to the front surface of said semiconductor substrate to form a second opening having a small diameter, thereby forming a composite opening of said first and second openings; depositing a first Au film on said entire back surface inclusive of the inner wall and bottom of said composite opening by plating; plating an Ni film on said first Au film; selectively forming a second Au film on said Ni film at the region expect a region constituting a via hole including said composite opening so that said Ni film at an area corresponding to at least the inner wall and bottom of said first opening in a region corresponding to said via hole is exposed, wherein said Ni film is an Ni alloy non-electrolytic plating film.
A sixteenth aspect of the method of manufacturing a semiconductor device is a method according to any one of the fourteenth and fifteenth aspect, wherein said first opening is made by wet isotropic etching or anisotropic dry etching.
A seventeenth aspect of the method of manufacturing a semiconductor device is a method according to the sixth aspect, wherein said first opening is made by the wet isotropic etching, the first and second openings are formed by etching using the same etching mask, and said etching mask has an opening pattern equal to the diameter of said second opening.
An eighteenth aspect of the method of manufacturing a semiconductor device is a method according to any one of the tenth , twelfth to fifteenth aspects , wherein the Au film exposed to the back -surface of said semiconductor substrate or said second Au film are bonded to the surface of a package substrate through AuSn solder which is a soldering material.
A nineteenth aspect of the etchant for an Ni alloy is an etchant of the nineteenth aspect, which is sulfuric/nitric acid containing sulfuric acid of 96 wt %, nitric acid of 70 wt % and water=1:1:3.
A twelfth aspect of the semiconductor device is a device according to the first aspect, wherein said semiconductor substrate is made of GaAs substrate.